/*
 * misc logic signal tricks by LPC810
 *   by uratan! 2014.11.14
 *     revised: 2016.09.04
 */

LPC810 has some interesting peripheral - Pattern Match Engine.
I can handle misc logic signal calculation with it, without any CPU actions.

get misc resources from:
    patch for this experiment: tricks.diff.txt
    base firmware: irt-06.zip
    circuit diagram: my60clock-17.png
    (about IrT and my 60-LED clock: 60clock.html)

[0] basis of this experiment

To drive Ir-LED with 38kHz modulation, original IrT uses 2 pins,
one for ANODE and the other for CATHODE.

[1] INVERT   (#define MAKE_INVERT_of_U1_TxD 1)

[2] AND   (#define MASK_CTOUT_by_TxD 1)

--- I may use internal port which does not have real pins to connect peripheral signals.
(except PIO0_10/11 which are true open-drain pins, never be high.)
    (NXP says: do not recommend...)

[3] OR   (#define MAKE_CTOUT_OR_TxD 1)

--- I may use another internal port for U1_TxD if raw U1_TxD is not needed outside of the chip.

[4] OR (part2)   (#define MERGE_TxD_n_CTOUT 1)

--- It seems that output signals are simply ORed with SWM by overwrapping assignment.
  (But the User Manual says - DO NOT USE !)

[5] make simple NAND logic by LPC810   (#define MAKE_a_NAND 1)

--- After power-up/RESET, it takes a little time to function this,
but you can use more inputs or misc options below.
    pull-UP/down Rs
    input hysteresis / glitch filter
    open-drain output

[9] about delays

It seems that, at least, final output signal RXEV / BMAT is synced by sysCLK.

[I] for INPUT signals   [2016.9.4]

It can be used to processing input signals.
I had to make some UART logger, had to sense 2 UART wire TxD and RxD.
But dip8 LPC810 has only 2 UART module, and the one is necessary to connect host PC.

I added (negative logic OR) 2 UART signals TxD / RxD by PME.
As for UART logger, yes it is not enough to sense full-duplex communications, but in my case, it is enough because half-duplex.